american microsystems, inc. april 2000 american microsystems, inc. reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. 4.24.00 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo iso9001 iso9001 iso9001 iso9001 1.0 features ? phase-locked loop (pll) device synthesizes output clock frequency from crystal oscillator or external ref- erence clock ? on-chip tunable voltage-controlled crystal oscillator (vcxo) allows precise system frequency tuning ? typically used for generation of mpeg-2 decoder clock ? 3.3v supply voltage ? very low phase noise pll ? use with ?pullable? 14pf crystals ? no external pad- ding capacitors required ? small circuit board footprint (8-pin 0.150 soic) ? custom frequency selections available - contact your local ami sales representative for more information figure 1: pin configuration 1 8 2 3 4 7 6 5 xin vdd xtune vss vss n/c clk xout fs6128 8-pin (0.150 ) soic 2.0 description the fs6128 is a monolithic cmos clock generator ic designed to minimize cost and component count in digital video/audio systems. at the core of the fs6128 is circuitry that implements a voltage-controlled crystal oscillator (vcxo) when an ex- ternal resonator (nominally 13.5mhz) is attached. the vcxo allows device frequencies to be precisely adjusted for use in systems that have frequency matching re- quirements, such as digital satellite receivers. a high-resolution phase-locked loop generates an output clock (clk) through a post-divider. the clk frequency is ratiometrically derived from the vcxo frequency. the locking of the clk frequency to other system reference frequencies can eliminate unpredictable artifacts in video systems and reduce electromagnetic interference (emi) due to frequency harmonic stacking. table 1: crystal / output frequencies device f xin (mhz) clk (mhz) FS6128-04 13.500 27.000 fs6128-05 13.500 13.500 fs6128-06 13.500 54.000 note: contact ami for custom pll frequencies figure 2: block diagram vcxo FS6128-04 fs6128-05 fs6128-06 pll xout xin clk xtune divider
american microsystems, inc. april 2000 2 4.24.00 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo iso9001 iso9001 iso9001 iso9001 table 2: pin descriptions key: ai = analog input; ao = analog output; di = digital input; di u = input with internal pull-up; di d = input with internal pull-down; dio = digital input/output; di-3 = three-level digital input, do = digital output; p = power/ground; # = active low pin pin type name description 1 ai xin vcxo feedback 2 p vdd power supply (+3.3v) 3 ai xtune vcxo tune 4 p vss ground 5 do clk clock output 6 - n/c no connection 7 do vss ground 8 ao xout vcxo drive 3.0 functional block description 3.1 voltage-controlled crystal oscillator (vcxo) the vcxo provides a tunable, low-jitter frequency refer- ence for the rest of the fs6128 system components. loading capacitance for the crystal is internal to the fs6128. no external components (other than the reso- nator itself) are required for operation of the vcxo. continuous fine-tuning of the vcxo frequency is accom- plished by varying the voltage on the xtune pin. the value of this voltage controls the effective capacitance presented to the crystal. the actual amount that this load capacitance change will alter the oscillator frequency de- pends on the characteristics of the crystal as well as the oscillator circuit itself. it is important that the crystal load capacitance is speci- fied correctly to ?center? the tuning range. see table 5. a simple formula to obtain the ?pulling? capability of a crystal oscillator is: () ()() c c c c c c c ppm f l l l l 1 0 2 0 6 1 2 1 2 10 ) ( + + ? = ? where: c 0 = the shunt (or holder) capacitance of the crystal c 1 = the motional capacitance of the crystal c l1 and c l2 = the two extremes (minimum and maximum) of the applied load capacitance presented by the fs6128. example: a crystal with the following parameters is used: c 1 = 0.025pf and c 0 = 6pf. using the minimum and maximum c l1 = 10pf, and c l2 = 20pf, the tuning range (peak-to-peak) is: () ()() ppm . f 300 10 6 20 6 2 10 6 10 20 025 0 = + + ? = ? . 3.2 phase-locked loop (pll) the on-chip pll is a standard frequency- and phase- locked loop architecture. the pll multiplies the reference oscillator frequency to the desired output frequency by a ratio of integers. the frequency multiplication is exact with a zero synthesis error (unless otherwise specified).
american microsystems, inc. april 2000 3 4.24.00 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo iso9001 iso9001 iso9001 iso9001 4.0 electrical specifications table 3: absolute maximum ratings stresses above those listed under absolute maximum ratings may cause permanent damage to the device. these conditions represent a stress rating only, and functional operation of the device at these or any other conditions above the operational limits noted in this specification is not implied. exposure to maximum rati ng conditions for extended conditions may affect device performance, functionality, and reliability. parameter symbol min. max. units supply voltage (v ss = ground) v dd v ss -0.5 7 v input voltage, dc v i v ss -0.5 v dd +0.5 v output voltage, dc v o v ss -0.5 v dd +0.5 v input clamp current, dc (v i < 0 or v i > v dd )i ik -50 50 ma output clamp current, dc (v i < 0 or v i > v dd )i ok -50 50 ma storage temperature range (non-condensing) t s -65 150 c ambient temperature range, under bias t a -55 125 c junction temperature t j 125 c lead temperature (soldering, 10s) 260 c input static discharge voltage protection (mil-std 883e, method 3015.7) 2 kv caution: electrostatic sensitive device permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy ele c- trostatic discharge. table 4: operating conditions parameter symbol conditions/description min. typ. max. units supply voltage v dd 3.3v 10% 3.0 3.3 3.6 v ambient operating temperature range t a 070c crystal resonator frequency f xtal fundamental mode 12 13.5 18 mhz
american microsystems, inc. april 2000 4 4.24.00 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo iso9001 iso9001 iso9001 iso9001 table 5: dc electrical specifications unless otherwise stated, v dd = 3.3v 10%, no load on any output, and ambient temperature range t a = 0c to 70c. parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits. where given, min and max characterization data are 3 f rom typical. negative currents indicate current flows out of the device. parameter symbol conditions/description min. typ. max. units overall supply current, dynamic, with loaded outputs i dd f xtal = 13.5mhz; c l = 10pf, v dd = 3.6v 30 ma supply current, static i dd xin = 0v, v dd = 3.6v 3 ma voltage controlled crystal oscillator (contact factory for approved crystal sources or other application assistance) crystal loading capacitance at center tuning voltage c l(xtal) order crystal for this capacitance (parallel load) at desired center frequency 14 pf crystal resonator motional capacitance c 1 specified motional capacitance of the crystal will affect pullability (see text) 25 ff xtune effective range 03v synthesized load capacitance min. c l1 @v(xtune)=minimum value 10 pf synthesized load capacitance max. c l2 @v(xtune)=maximum value 20 pf vcxo tuning range f xtal = 13.5mhz; c l(xtal) = 14pf; c 1(xtal) = 25ff (peak-to-peak) 300 ppm vcxo tuning characteristic note: positive change of xtune = positive change of vcxo frequency 150 ppm/v crystal drive level r xtal =20 ? ; c l = 20pf 200 uw clock output (clk) high-level output source current * i oh v o = 2.0v -40 ma low-level output sink current * i ol v o = 0.4v 17 ma z oh v o = 0.1v dd ; output driving high 25 output impedance * z ol v o = 0.1v dd ; output driving low 25 ? short circuit source current * i osh v o = 0v; shorted for 30s, max. -55 ma short circuit sink current * i osl v o = 3.3v; shorted for 30s, max. 55 ma
american microsystems, inc. april 2000 5 4.24.00 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo iso9001 iso9001 iso9001 iso9001 table 6: ac timing specifications unless otherwise stated, v dd = 3.3v 10%, no load on any output, and ambient temperature range t a = 0c to 70c. parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits. where given, min and max characterization data are 3 f rom typical. parameter symbol conditions/description min. typ. max. units overall vcxo stabilization time * t vcxostb from power valid 10 ms pll stabilization time * t pllstb from vcxo stable 100 us synthesis error (unless otherwise noted in frequency table) 0 ppm clock output (clk) duty cycle * ratio of high pulse width (as measured from rising edge to next falling edge at v dd /2) to one clock period 45 55 % jitter, period (peak-peak) * t j( ? p) from rising edge to next rising edge at v dd /2, c l = 10pf 200 ps jitter, long term ( y ( )) * t j(lt) from 0-500 s at v dd /2, c l = 10pf compared to ideal clock source 100 ps rise time * t r v dd = 3.3v; v o = 0.3v to 3.0v; c l = 10pf 1.7 ns fall time * t f v dd = 3.3v; v o = 3.0v to 0.3v; c l = 10pf 1.7 ns
american microsystems, inc. april 2000 6 4.24.00 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo iso9001 iso9001 iso9001 iso9001 5.0 package information table 7: 8-pin soic (0.150") package dimensions dimensions inches millimeters min. max. min. max. a 0.061 0.068 1.55 1.73 a1 0.004 0.0098 0.102 0.249 a2 0.055 0.061 1.40 1.55 b 0.013 0.019 0.33 0.49 c 0.0075 0.0098 0.191 0.249 d 0.189 0.196 4.80 4.98 e 0.150 0.157 3.81 3.99 e 0.050 bsc 1.27 bsc h 0.230 0.244 5.84 6.20 h 0.010 0.016 0.25 0.41 l 0.016 0.035 0.41 0.89 0 8 0 8 b d a 1 seating plane h e 8 1 all radii: 0.005" to 0.01" base plane a 2 e american microsystems, inc. a r c l 7 typ. h x 45 table 8: 8-pin soic (0.150") package characteristics parameter symbol conditions/description typ. units thermal impedance, junction to free-air 8-pin 0.150? soic ja air flow = 0 m/s 110 c/w corner lead 2.0 lead inductance, self l 11 center lead 1.6 nh lead inductance, mutual l 12 any lead to any adjacent lead 0.4 nh lead capacitance, bulk c 11 any lead to v ss 0.27 pf
american microsystems, inc. april 2000 7 4.24.00 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 FS6128-04 / fs6128-05 / fs6128-06 pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo pll clock generator ic with vcxo iso9001 iso9001 iso9001 iso9001 6.0 ordering information table 9: device ordering codes ordering code device number package type operating temperature range shipping configuration 11640-825 FS6128-04 8-pin (0.150?) soic (small outline package) 0 c to 70 c (commercial) tape and reel 11640-835 FS6128-04 8-pin (0.150?) soic (small outline package) 0 c to 70 c (commercial) tubes 11640-102 fs6128-05 8-pin (0.150?) soic (small outline package) 0 c to 70 c (commercial) tape and reel 11640-112 fs6128-05 8-pin (0.150?) soic (small outline package) 0 c to 70 c (commercial) tubes 11640-103 fs6128-06 8-pin (0.150?) soic (small outline package) 0 c to 70 c (commercial) tape and reel 11640-113 fs6128-06 8-pin (0.150?) soic (small outline package) 0 c to 70 c (commercial) tubes 7.0 revision information date page description 1/21/00 1 fixed typographical error 4/24/00 5 fixed formatting error copyright ? 2000 american microsystems, inc. devices sold by ami are covered by the warranty and patent indemnification provisions appearing in its terms of sale only. ami makes no warranty, express, statutory implied or by description, regarding the information set forth herein or regarding the fr eedom of the described devices from patent infringement. ami makes no warranty of merchantability or fitness for any purposes. ami re - serves the right to discontinue production and change specifications and prices at any time and without notice. ami?s products are intended for use in commercial applications. applications requiring extended temperature range, unusual environmental require- ments, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recom- mended without additional processing by ami for such applications. american microsystems, inc., 2300 buckskin rd., pocatello, id 83201, (208) 233-4690, fax (208) 234-6796, www address: http://www.amis.com e-mail: tgp@amis.com
|
